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Election Hacks
Zeidman v. Lindell: Exposing the $5 million election myth
MyPillow CEO Mike Lindell has declared he holds proof of voting machine tampering that threw the 2020 U.S. presidential election from Donald Trump to Joe Biden. Bob Zeidman, who invented the field of software forensics, examined the data and found bogus information, manipulated results, and dangerous conspiracy theories.
This is the story of Bob’s successful $5 million lawsuit against Lindell and his uncovering of a scandal leading to some of the top political leaders and advisors in America.
Election Hacks is a warning about the 2024 election. It’s a personal story about going up against a rich, powerful, influential businessman. It’s a technological mystery, a courtroom drama, and a character study of extremists and their enablers. It’s about human nature and how people can so easily be led astray. And it’s about standing up for the truth, even when that truth may turn out to belie your beliefs and alienate your friends.
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Just Enough Electronics to Impress Your Friends and Colleagues
This book is for anyone but electrical engineers. If you work with them, work for them, manage them, market to them, or sell to them, you'll want to read this. This book will take you on a whirlwind tour of the fundamentals of electronics. By the end, you'll be familiar with the basic concepts of various kinds of modern electronic technologies and devices. You'll be able to impress friends at cocktail parties, enhance your standing at work, and maybe even communicate with the brainy men and women who are changing the world. The topics covered are:
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The Software IP Detective's Handbook
Measurement, Comparison, and Infringement Detection
Pioneering expert Bob Zeidman–creator of CodeSuite®, the world’s #1 software IP analysis tool–thoroughly covers all technical and legal aspects of IP theft detection. Using his rigorous framework and practical examples, you can accurately determine whether software copying, theft, or infringement has occurred, and fully support your findings in any venue.
This book will help you: Understand the key concepts that underlie software IP analysis
Compare and correlate source code
Identify and measure copying
Uncover signs of copying in object code when source code is inaccessible
Compare functional source code statements to nonfunctional comments
Confirm suspected theft or infringement
Track malware and third-party code in applications
Use software clean rooms to avoid IP infringement
Understand IP issues associated with open source and DMCA
Click here for a list of errata. |
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Introduction To Verilog
Hardware Description Languages (HDLs) use statements, like programming language statements, in order to define, simulate, synthesize, and layout hardware. One of the main HDLs is Verilog, a widely used and standardized language. Verilog can be used to design anything from the most complex ASIC to the least complex PAL. As ASICs and FPGAs become more complex, HDLs become a necessity for their design. This course teaches how to use Verilog to design and simulate hardware. It begins by explaining the benefits of HDLs over other design entry methods, including its ability to model different levels of abstraction, its reusability, and documentability. Next, the syntax of the Verilog language is explained in detail. By the end of the course, you will be able to design and simulate real hardware using Verilog.
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Designing With FPGAs And CPLDs
Choose the right programmable logic devices with this guide to the technologies and internal architectures of Field Programmable Gate Arrays (FPGAs) and Complex Programmable Logic Devices (CPLDs). Engineers will learn about important design, verification, synthesis, and testing issues as well as the different Electronic Design Automation (EDA) tools available. Engineering managers can use the step-by-step Universal Design Methodology™ (UDM) to optimally allocate resources and manpower and to accurately schedule and budget the development process. The result is a working, reliable chip.
Click here for a list of errata.
Universal Design Methodology (UDM) is a trademark of Zeidman Consulting. It may be used freely as long as its use generally conforms to the accepted definition as stated in the book.
This book won the Jolt Reader's Choice Award from Software Development magazine.
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Verilog Designers Library
Why start coding from scratch when you can work from this library of pre-tested routines, created by an HDL expert? There are plenty of introductory texts to describe the basics of Verilog, but Verilog Designer's Library is the only book that offers real, reusable routines that you can put to work right away. Verilog Designer's Library organizes Verilog routines according to functionality, making it easy to locate the material you need. Each function is described by a behavioral model to use for simulation, followed by the RTL code you'll use to synthesize the gate-level implementation. Extensive test code is included for each function, to assist you with your own verification efforts.
Essential Verilog coding techniques
Basic building blocks of successful routines
State machines and memories
Practical debugging guidelines
Although Verilog Designer's Library assumes a basic familiarity with Verilog structure and syntax, it does not require a background in programming. Beginners can work through the book in sequence to develop their skills, while experienced Verilog users can go directly to the routines they need. Hardware designers, systems analysts, VARs, OEMs, software developers, and system integrators will find it an ideal sourcebook on all aspects of Verilog development.
The CD-ROM includes all of the Verilog code from the book.
Click here for a list of errata. |
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